Based on the industry's most advanced P4 programmable chip architecture, programmable processing of traffic data plane is realized, which brings you the following values:

• The high performance and high flexibility of data plane processing are taken into account
• Seamless adaptation to a variety of complex tunnel packaging, such as data center VXLAN/MPLS/GTP and other tunnel protocols
• Powerful data packet re-encapsulation function, support network telemetry, high-precision timestamp marking, data packet secondary encapsulation and peeling encapsulation

The industry's most advanced high-volume NP processing architecture helps you:

• The unified pre-processing of the whole network aggregated traffic realizes advanced data packet processing, such as DFI/DPI packet classification identification and classification scheduling
• The real full flow and full collection point data traffic are centrally processed, eliminating the load balancing and node synchronization of the distributed processing architecture
• The repeated processing of the whole network traffic is uniformly removed, and the network communication behavior data is completely outlined on the monitoring view with no dead ends

Dedicated ASIC chip

• The data acquisition unit is based on a dedicated ASIC chip, which provides wire-speed forwarding performance of massive ACL policies
• It has the ability of GE/10G/25G/40G/100G traffic data access
• Multi-node full-path network traffic collection scenarios are supported to meet the full traffic control requirements up to the data center level